Introducing memory barriers

Finally, let’s address another concern – that of the memory barrier. What does it mean? Sometimes, a program’s flow becomes unknown to the human programmer, as the microprocessor, the memory controllers, and the compiler can reorder memory reads and writes. In most cases, these “tricks” remain benign and typically optimize performance. But there are cases where this kind of reordering of (memory I/O) instruction sequences should not occur; the original and programmer-intended memory load and store sequences must be honored. What cases? Typically, these:

• When working across hardware boundaries, such as across individual CPU cores on multicore systems
• When performing atomic operations
• When accessing peripheral devices (like performing I/O from a CPU to a peripheral device or vice versa, often via Direct Memory Access (DMA))
• When working with hardware interrupts

The memory barrier (typically...