Having a single interrupt from the CPU is usually not enough. Most systems have tens and hundreds of them. Now comes the interrupt controller, allowing them to be multiplexed. Very often, architecture or platform-specific interrupt controllers offer specific facilities, such as:
- Masking/unmasking individual interrupts
- Setting priorities
- SMP affinity
- Exotic things such as wake-up interrupts
IRQ management and interrupt controller drivers both rely on the IRQ domain, its turn built on top of the following structures:
- struct irq_chip: This structure implements a set of methods describing how to drive the interrupt controller, and which are directly called by core IRQ code.
- struct irqdomain structure, which provides:
- A pointer to the firmware node for a given interrupt controller (fwnode)
- A method to convert a firmware description...
