Summary

In this chapter, we’ve seen how we can use our knowledge of both SystemVerilog and VHDL sequential and combinational elements to develop and implement state machines. We’ve looked at two classical state machine designs, Mealy and Moore, and then implemented a simple calculator using this knowledge. We also touched on some basic math as well as exploring how to develop an integer divider using HDLs.

We looked at design reuse by implementing a package for our calculator and also reusing the leading ones detector we developed previously.

We saw at a high level how we can control our clock speed using a PLL so the design will run on the board.

With this knowledge, you can now look at expanding the calculator. We are currently only handling unsigned numbers. However, it wouldn’t be that hard to make it handle signed numbers. We also took a look at how we can use PWM to light an RGB LED and we created a traffic light controller to take advantage...