Hardware Description Languages (HDLs)

Prior to the development of HDLs, you would create a design using schematic capture or a very primitive language like PALASM or ABLE to implement a design. Schematic capture could be done at the transistor level for ASICs or gate-level primitives, but much of the process was manual. The very first CPUs were designed by hand on large sheets of paper. In my first VLSI class, I designed a 60 Hz notch filter by hand over very many long nights using MAGIC, a design entry package. There was no auto-routing and cell placement was manual at the transistor level. If there were lots of level changes and jogging around due to not leaving enough room for traces, everything had to be ripped up and re-placed and routed by hand.

Luckily, these days, we can do most of our designs using HDL. This textual representation is compact, relatively easy to read, and easy to simulate. However, we do have to address the fact that the industry has settled on two different...