You're reading from FPGA Programming for Beginners Bring your ideas to life by creating hardware designs and electronic circuits with SystemVerilog

Product type Paperback

Published in Mar 2021

Publisher Packt

ISBN-13 9781789805413

Length 368 pages

Edition 1st Edition

Languages

Assembly

Tools

FPGA

Concepts

Embedded Systems

Author (1):

Frank Bruno

View More author details

Table of Contents (16) Chapters

Preface

1. Section 1: Introduction to FPGAs and Xilinx Architectures

2. Chapter 1: Introduction to FPGA Architectures and Xilinx Vivado FREE CHAPTER

3. Section 2: Introduction to Verilog RTL Design, Simulation, and Implementation

4. Chapter 2: Combinational Logic

5. Chapter 3: Counting Button Presses

6. Chapter 4: Let's Build a Calculator

7. Chapter 5: FPGA Resources and How to Use Them

8. Chapter 6: Math, Parallelism, and Pipelined Design

9. Section 3: Interfacing with External Components

10. Chapter 7: Introduction to AXI

11. Chapter 8: Lots of Data? MIG and DDR2

12. Chapter 9: A Better Way to Display – VGA

13. Chapter 10: Bringing It All Together

14. Chapter 11: Advanced Topics

15. Other Books You May Enjoy

Project 9 – creating IPs for Vivado using AXI streaming interfaces

In this project, we are going to take our I2C temperature sensor and split it into IPs that we can use in the IP integrator to reconstruct our project.

Our initial design looked like this:

Figure 7.2 – Original temperature sensor pipeline

Looking at the Xilinx floating-point IP, fix to float, float to fix, add/sub, scaler, and fused multiply/add are all IP blocks with streaming interfaces. What we need to address is the I2C interface that reads the temperature from the ADT7420, the temperature pipeline itself, and the seven-segment display interface. Let's tackle the seven-segment display first.

Seven-segment display streaming interface

The first thing we need to do is create a directory to house our IP sources. This will make packaging easier. We'll do this by creating a directory under CH7/build/IP/seven_segment. Inside this directory, we have an hdl directory...