Chapter 6. IR to Selection DAG phase
Until the previous chapter, we saw how a frontend language can be converted to LLVM IR. We also saw how IR can be transformed into more optimized code. After a series of analysis and transformation passes, the final IR is the most optimized machine independent code. However, the IR is still an abstract representation of the actual machine code. The compiler has to generate target architecture code for execution.
LLVM uses DAG—a directed acyclic graph representation for code generation. The idea is to convert IR into a SelectionDAG and then go over a series of phases—DAG combine, legalization, instruction selection, instruction scheduling, etc—to finally allocate registers and emit machine code. Note that register allocation and instruction scheduling take place in an intertwined manner.
We are going to cover following topics in this chapter:
- Converting IR to selectionDAG
- Legalizing selectionDAG
- Optimizing selectionDAG
- Instruction...
