Summary
In this chapter, we presented the TC1 simulator, which can take a text file in TC1 assembly language, convert it into machine code, and then execute it. TC1’s instruction set architecture is close to the classic RISC architecture with a register-to-register architecture (i.e., data operations take place on the contents of registers). The only memory operations permitted are loading a register from memory (or a literal) and storing a register in memory.
The simulator has two basic components: an assembler that translates a mnemonic such as ADD r1,r2,r3 into a 32-bit binary instruction, and an interpreter that reads the instruction, extracts the necessary information, and then executes the instruction.
Some of the elements of TC1 are rather unusual. A free-format structure for the source code is provided; for example, you can write ADD r1,r2,r3 or adD R1 r2 r3 and both instructions will be happily accepted. Why? First, it was done to demonstrate the use of string...
