Writing an instruction selector

LLVM uses the SelectionDAG representation to represent the LLVM IR in a low-level data-dependence DAG for instruction selection. Various simplifications and target-specific optimizations can be applied to the SelectionDAG representation. This representation is target-independent. It is a significant, simple, and powerful representation used to implement IR lowering to target instructions.

How to do it…

The following code shows a brief skeleton of the SelectionDAG class, its data members, and various methods used to set/retrieve useful information from this class. The SelectionDAG class is defined as follows:

class SelectionDAG {
const TargetMachine &TM;
const TargetLowering &TLI;
const TargetSelectionDAGInfo &TSI;
MachineFunction *MF;
LLVMContext *Context;
CodeGenOpt::Level OptLevel;

SDNode EntryNode;
// Root - The root of the entire DAG.
SDValue Root;

// AllNodes - A linked list of nodes in the current DAG.
ilist<SDNode> AllNodes;

// NodeAllocatorType...