You're reading from Architecting and Building High-Speed SoCs Design, develop, and debug complex FPGA based systems-on-chip

Product type Paperback

Published in Dec 2022

Publisher Packt

ISBN-13 9781801810999

Length 426 pages

Edition 1st Edition

Tools

FPGA

Concepts

Design

Author (1):

Mounir Maaref

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Table of Contents (20) Chapters

Preface

1. Part 1: Fundamentals and the Main Features of High-Speed SoC and FPGA Designs

2. Chapter 1: Introducing FPGA Devices and SoCs FREE CHAPTER

3. Chapter 2: FPGA Devices and SoC Design Tools

4. Chapter 3: Basic and Advanced On-Chip Busses and Interconnects

5. Chapter 4: Connecting High-Speed Devices Using Buses and Interconnects

6. Chapter 5: Basic and Advanced SoC Interfaces

7. Part 2: Implementing High-Speed SoC Designs in an FPGA

8. Chapter 6: What Goes Where in a High-Speed SoC Design

9. Chapter 7: FPGA SoC Hardware Design and Verification Flow

10. Chapter 8: FPGA SoC Software Design Flow

11. Chapter 9: SoC Design Hardware and Software Integration

12. Part 3: Implementation and Integration of Advanced High-Speed FPGA SoCs

13. Chapter 10: Building a Complex SoC Hardware Targeting an FPGA

14. Chapter 11: Addressing the Security Aspects of an FPGA-Based SoC

15. Chapter 12: Building a Complex Software with an Embedded Operating System Flow

16. Chapter 13: Video, Image, and DSP Processing Principles in an FPGA and SoCs

17. Chapter 14: Communication and Control Systems Implementation in FPGAs and SoCs

18. Index

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19. Other Books You May Enjoy

Questions

Answer the following questions to test your knowledge of this chapter:

Name some of the reasons that make an FPGA-based SoC the primary target technology for a full SoC system architecture implementation.
How does the architecture definition phase interact with the company’s business strategy and its decision-making process?
List the main technical criteria that make a specific FPGA SoC a potential target device to implement the projected SoC architecture.
Summarize the methodology to use to start the architecture exploration phase, as presented in this chapter.
How is the architecture exploration phase concluded and what is its overall objective?
What step follows the architecture exploration phase and what is its main objective?
Describe the main functions that are performed by the ETS introduced in this chapter.
Why is UDP packet filtering chosen to be performed in hardware rather than in software?
How does the hardware-based...

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Table of Contents (20) Chapters

Questions

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Table of Contents (20) Chapters

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