You're reading from Architecting and Building High-Speed SoCs Design, develop, and debug complex FPGA based systems-on-chip

Product type Paperback

Published in Dec 2022

Publisher Packt

ISBN-13 9781801810999

Length 426 pages

Edition 1st Edition

Tools

FPGA

Concepts

Design

Author (1):

Mounir Maaref

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Table of Contents (20) Chapters

Preface

1. Part 1: Fundamentals and the Main Features of High-Speed SoC and FPGA Designs

2. Chapter 1: Introducing FPGA Devices and SoCs FREE CHAPTER

3. Chapter 2: FPGA Devices and SoC Design Tools

4. Chapter 3: Basic and Advanced On-Chip Busses and Interconnects

5. Chapter 4: Connecting High-Speed Devices Using Buses and Interconnects

6. Chapter 5: Basic and Advanced SoC Interfaces

7. Part 2: Implementing High-Speed SoC Designs in an FPGA

8. Chapter 6: What Goes Where in a High-Speed SoC Design

9. Chapter 7: FPGA SoC Hardware Design and Verification Flow

10. Chapter 8: FPGA SoC Software Design Flow

11. Chapter 9: SoC Design Hardware and Software Integration

12. Part 3: Implementation and Integration of Advanced High-Speed FPGA SoCs

13. Chapter 10: Building a Complex SoC Hardware Targeting an FPGA

14. Chapter 11: Addressing the Security Aspects of an FPGA-Based SoC

15. Chapter 12: Building a Complex Software with an Embedded Operating System Flow

16. Chapter 13: Video, Image, and DSP Processing Principles in an FPGA and SoCs

17. Chapter 14: Communication and Control Systems Implementation in FPGAs and SoCs

18. Index

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FPGA SoC Software Design Flow

In this chapter, we will delve into the implementation phase of the SoC software of the Electronic Trading System (ETS) for which we developed the architecture in Chapter 6, What Goes Where in a High-Speed SoC Design, and built the hardware in Chapter 7, FPGA SoC Hardware Design and Verification Flow, FPGA SoC Hardware Design and Verification Flow. We will define the SoC software microarchitecture for both the Cortex-A9 processor and its accelerator, the MicroBlaze Packet Processor (PP). We will explore the embedded software development flow using the Xilinx Vitis environment and how to write simple software to run on the SoC processors. We will mainly use the Vitis IDE-generated test application source code for the peripherals included in the design to understand how to configure, access, and then use them. This exercise will prepare you to write more complex software applications for the ETS SoC design in Part 3. This chapter is mainly hands-on and you...

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You're reading from Architecting and Building High-Speed SoCs Design, develop, and debug complex FPGA based systems-on-chip

Table of Contents (20) Chapters

FPGA SoC Software Design Flow

Authors (1)

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Table of Contents (20) Chapters

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