Flow control instructions
Computers execute instructions sequentially unless a branch causes a jump to an out-of-sequence instruction, or the flow of instructions is interrupted when a subroutine is called. The instruction flow is also changed when an interrupt occurs (we don’t deal with interrupts here).
In this section, we will look at the following:
- Unconditional branches
- Conditional branches
Unconditional branches
ARM’s unconditional branch is expressed as b target, where target denotes the branch target address (the address of the next instruction to be executed). The unconditional branch forces a jump (branch) from one point in a program to another. It is exactly the same as the unconditional branch we introduced earlier. The following ARM code demonstrates how the unconditional branch is used:
.. do this @ Some code
...
