Chapter 6. The Backend
The backend is comprised of the set of code generation analysis and transform passes that converts the LLVM intermediate representation (IR) into object code (or assembly). LLVM supports a wide range of targets: ARM, AArch64, Hexagon, MSP430, MIPS, Nvidia PTX, PowerPC, R600, SPARC, SystemZ, X86, and XCore. All these backends share a common interface, which is part of the target-independent code generator, abstracting away the backend tasks by means of a generic API. Each target must specialize the code generator generic classes to implement target-specific behavior. In this chapter, we will cover many general aspects about an LLVM backend that are useful for readers interested in writing a new backend, maintaining an existing backend, or writing backend passes. We will cover the following topics:
- Overview of the LLVM backend organization
- How to interpret the various TableGen files that describe a backend
- What is and how does the instruction selection happen...
