Search icon CANCEL
Arrow left icon
Explore Products
Best Sellers
New Releases
Books
Videos
Audiobooks
Learning Hub
Conferences
Free Learning
Arrow right icon
Arrow up icon
GO TO TOP
FPGA Programming for Beginners

You're reading from   FPGA Programming for Beginners Bring your ideas to life by creating hardware designs and electronic circuits with SystemVerilog

Arrow left icon
Product type Paperback
Published in Mar 2021
Publisher Packt
ISBN-13 9781789805413
Length 368 pages
Edition 1st Edition
Languages
Tools
Arrow right icon
Author (1):
Arrow left icon
Frank Bruno Frank Bruno
Author Profile Icon Frank Bruno
Frank Bruno
Arrow right icon
View More author details
Toc

Table of Contents (16) Chapters Close

Preface 1. Section 1: Introduction to FPGAs and Xilinx Architectures
2. Chapter 1: Introduction to FPGA Architectures and Xilinx Vivado FREE CHAPTER 3. Section 2: Introduction to Verilog RTL Design, Simulation, and Implementation
4. Chapter 2: Combinational Logic 5. Chapter 3: Counting Button Presses 6. Chapter 4: Let's Build a Calculator 7. Chapter 5: FPGA Resources and How to Use Them 8. Chapter 6: Math, Parallelism, and Pipelined Design 9. Section 3: Interfacing with External Components
10. Chapter 7: Introduction to AXI 11. Chapter 8: Lots of Data? MIG and DDR2 12. Chapter 9: A Better Way to Display – VGA 13. Chapter 10: Bringing It All Together 14. Chapter 11: Advanced Topics 15. Other Books You May Enjoy

What is a sequential element?

We looked at the latch in Chapter 1, Introduction to FPGA Architectures and Xilinx Vivado, and we saw that it's not something we really want to be using. What FPGA designers use to store information is a register, or flip flop. Before we create our first flip flop, we need a quick introduction to clocks.

Clocking your design

In the realm of digital logic, we usually need at least one source of timing in our design and often several. We call this source of timing a clock, which is usually generated by an external crystal oscillator that vibrates at a certain frequency and generates a string of 0s and 1s in our design. Sometimes we'll use the clock input directly, but if we need a specific frequency faster or slower than our input, we have other options such as Phase Locked Loops (PLLs) and Mixed Mode Clock Managers (MMCMs), which we'll discuss in Chapter 5, FPGA Resources and How to Use Them.

When we draw timing diagrams, we typically...

lock icon The rest of the chapter is locked
Register for a free Packt account to unlock a world of extra content!
A free Packt account unlocks extra newsletters, articles, discounted offers, and much more. Start advancing your knowledge today.
Unlock this book and the full library FREE for 7 days
Get unlimited access to 7000+ expert-authored eBooks and videos courses covering every tech area you can think of
Renews at $19.99/month. Cancel anytime