Index

As this ebook edition doesn't have fixed pagination, the page numbers below are hyperlinked for reference only, based on the printed edition of this book.

Symbols

>region directive 93

3-axis accelerometer 249

A

acknowledge (ACK) bit 263

ADC channels 216

multiplexing 217

ADC Control Register 1 (ADC_CR1)

key bits 219

ADC Control Register 2 (ADC_CR2)

key bits 220

ADC DMA driver

developing 360-364

ADC driver

developing 222

GPIO pins, identifying 222-228

project, testing 229, 230

ADC flags

Analog Watchdog (AWD) flag 221

end of conversion (EOC) flag 221

end of injected conversion (JEOC) flag 221

overrun (OVR) flag 221

start conversion (STRT) flag 221

ADC modes

continuous conversion mode 218

discontinuous mode 218

injected conversion mode 218

scan mode 218

single conversion mode 217

ADC registers and flags 219

ADC Control Register 1 (ADC_CR1) 219

ADC Control Register 2 (ADC_CR2) 220

ADC Data Register (ADC_DR) 220

ADC Regular Sequence Register (ADC_SQRx) 220

ADC Status Register (ADC_SR) 221

key ADC flags 221

ADC Regular Sequence Register (ADC_SQRx)

key bits 220

address frame 263, 264

address relocation 84

Advanced High-Performance Bus 1 (AHB1) 41

Advanced High-Performance Bus (AHB) 38, 182

Advanced Peripheral Bus (APB) 38

APB1 prescaler 183

APB2 prescaler 183

advanced timer

features 180

ADXL345 248, 249

applications 250

features 249

sensing function 250, 251

ADXL345 driver

adxl_init() function 257-259

adxl_read() function 256

adxl_write() function 256

developing 253

header file 253-256

ADXL345 I2C driver 280, 281

AHB1 ER 40, 41

alarm registers 308

alias 52

ALIGN directive 94

allocatable sections 83

alternate function high register (AFRH) 155

alternate function low register (AFRL) 155

analog-to-digital conversion

encoding 213

overview 212

quantization 212

sampling 212

analog-to-digital converters (ADCs) 36, 82, 179, 195

operations 152

Analog Watchdog enable (AWDEN) 219

arbiter 353

ARM

generic user guide 15, 16

arm-none-eabi-gcc command 63

arm-none-eabi-nm command 66

arm-none-eabi-objcopy command 67

arm-none-eabi-objdump command 66

arm-none-eabi-readelf command 67

arm-none-eabi-size command 66

assembly and C files compilation 69, 70

linking process 70

list file creation 70

size calculation 70

assembly language 24-29

asynchronous communication 190

asynchronous mode (UART) 200

AT directive 95

autonomous drones

GPS module integration 195

auto-reload register 181

B

backup registers 310

Bare-Metal C programming 24-27

bare-metal programming 23, 59

battery management system (BMS) 218

baud rate 199

significance 199, 200

standard baud rates 200

Baud Rate Register (BRR) 206

Binary-Coded Decimal (BCD) 307, 323

features 323

using, in RTC configurations 324-326

working 323

bit 43

clearing 44

setting 43

bit mask 52

bit rate 199

bits per second (bps) 199

Block Started by Symbol (.bss) 85

Build icon 21

build process

assembly and C files

compilation 69

firmware, uploading to microcontroller with OpenOCD 74-78

foundations 60

GNU bin tools, working with 70-74

observing, from IDE’s perspective 68, 69

build systems 118

components 120

tasks 118

C

central processing unit (CPU) 36

Chip Select (CS) 234

clock gating 39, 40, 383

implementing, ways 383

smart home devices, example use case 383

Clock Phase (CPHA) 237

Clock Polarity (CPOL) 237

clock sources 305, 306

CMSIS-Core Device Files 141

CMSIS-Core files 140-142

CMSIS-Core (M) 139

CMSIS-Core Standard Files 141

CMSIS-Driver 139

CMSIS-DSP 139

CMSIS files

right header files, obtaining 142, 143

setting up 142

working with 143-147

CMSIS-NN 139

CMSIS-Pack 140

CMSIS-RTOS 139

CMSIS-SVD 140

Common Microcontroller Software Interface Standard (CMSIS) 131-139

benefits 139

coding rules 140

components 139, 140

qualifiers 140

communication interfaces 36

communication protocols 190

constants

in linker scripts 95, 96

control icons 21

Build icon 21

New icon 21

control registers 310

Cortex®-M4 with FPU system control register 385

counter register 181

counters 36

counting modes

down-counting mode 181

up-counting mode 181

C structures

peripheral registers, defining 132

D

data frames 263, 264

Data In (DIN) 234

data modes 237

Data Out (DOUT) 234

date register (RTC_DR) 307

Debug icon 21

development board 13

making, with ARM Holdings 14

NUCLEO-F411 development board 13, 14

role 13

development tools, microcontrollers

GNU Arm Embedded Toolchain, setting up 5, 6

IDEs 2, 3

OpenOCD, setting up 6-12

STM32CubeIDE, setting up 3, 4

toolchain 3

Digital Signal Processing (DSP) 139

Digital-to-Analog Converter (DAC) 195, 351

Direct Memory Access (DMA) 267, 350

features 351

use cases 351

working 350

discontinuous mode (DISCEN) 219

DMA1 Stream5 371

DMA memory-to-memory driver

developing 374-379

DMA Stream6 371

DMA Stream Configuration Register (DMA_SxCR) 359

DMA Stream Memory Address Registers (DMA SxM0AR and DMA_SxM1AR)_ 360

DMA Stream Number of Data Register (DMA_SxNDTR) 359

DMA Stream Peripheral Address Register (DMA_SxPAR) 360

DMA use cases

audio streaming 352

high-speed data acquisition 352

LCD display refresh 353

driver

developing, to enter standby mode and wake up 390-395

dynamic acceleration 249, 252

Dynamic Voltage and Frequency Scaling (DVFS) 382

implementing, ways 382

mobile phones, example use case 382

E

Embedded Application Binary Interface 63

enable register (ER) 27, 41

encoding 213

end of conversion interrupt enable (EOCIE) 219

energy-efficient smartwatch case study 384

clock gating 384

DVFS 384

low-power modes 384

power gating 384

engine control unit (ECU) 335

ENTRY directive 89

environmental monitoring system 389

for smart agriculture 196

Executable and Linkable Format (ELF) 62, 90

external interrupts 387, 388, 394

EXTI configuration 388

GPIO configuration 388

NVIC configuration 388

external WDTs 337

features 337

EXTI driver development 294

EXTI driver 295-299

EXTI_FTSR 295

EXTI_IMR 295

EXTI_RTSR 295

pending register (EXTI_PR) 295

F

feeding the watchdog 334

FIFO buffer 251

firmware development 24

firmware projects

Makefiles, writing for 124-127

First-In-First-Out (FIFO) 351

flash memory 80

flash memory area 99

force of gravity (g) 253

foundations, build process 60

assembly stage 61

compilation stage 61

linking stage 62

locating stage 62

pre-processing stage 60, 61

FPDS (Flash Power Down in Stop Mode) 392

full-duplex communication

versus half-duplex communication 191

G

General-Purpose Input/Output (GPIO) peripheral 149, 150

General Purpose Input/Output (GPIO) pin 24, 132

general-purpose timers (TIM) 177

features 180

gigabytes (GB) 81

GNU Arm Embedded Toolchain

setting up 5, 6

GNU binary tools, for embedded systems 63

architecture-specific flags 65

arm-none-eabi-gcc 63

commands 66, 67

common compiler flags 64

GNU Compiler Collection (GCC) 3, 63

GNU Debugger (GDB) 76, 115, 128

GPIOA 150

GPIOA Enable 42

GPIO alternate function registers 155, 157

GPIOB 150

GPIO bit-set/reset register (GPIOx_BSRR) 154

structure 154

GPIOC 150

GPIO input data register (GPIOx_IDR) 153

GPIO input driver 162-164

GPIO mode register (GPIOx_MODER) 151, 152

GPIO output data register (GPIOx_ODR) 152

GPIO output data register (ODR) 152

GPIO output driver

with BSRR 158-162

GPIO PORTA

locating 35-37

GPIO port mode register (GPIOx_MODER) 44-47

GPIO Port Output Data Register (GPIOx_ODR) 47, 48

GPIO ports 36

GPIOx_AFRH 155

GPIOx_AFRL 155

GPS module integration

for autonomous drones 195

Graphical User Interface (GUI) 2

H

half-duplex communication

versus full-duplex communication 191

Hardware Abstraction Layer (HAL) 24

benefits 25

drawbacks 25

hardware interrupts 100

helper functions 372

High-performance Bus Clock (HCLK) 182

high-speed external (HSI) 305

I

I2C Clock Control Register (I2C_CCR) 268

key bits 268

I2C Control Register 1 (I2C_CR1) 267

key bits 268

I2C Control Register 2 (I2C_CR2) 268

key bits 268

I2C Data Register (I2C_DR) 269

I2C driver

ADXL345 I2C driver 280, 281

developing 269

initialization function 269-272

main function 282, 283

read function 273-278

write function 278, 279

I2C interface

Serial Clock (SCL) 262

Serial Data (SDA) 262

I2C TRISE register (I2C_TRISE) 269

IDEs for microcontroller firmware development

IAR Embedded Workbench 2

STM32CubeIDE 2

Independent Watchdog (IWDG) timer 333, 337, 338

features 337

registers 340, 341

industrial control system (ICS) 337

industrial process control (IPC) 179

Information Center 17

integrated development environment (IDE) 24

Inter-Integrated Circuit (I2C) 36, 190-194, 234, 261, 262

addressable devices 262

advantages 194

communication process 263

data transfer 264

data transmission process 266

disadvantages 194

features 193

master device 263

multi-master 262

multi-slave 262

simple and low-cost 262

slave device 263

speed variants 262

synchronous communication 262

two-wire interface 262

use cases 196

working 263-266

internal events 389

event handling 390

peripheral configuration 390

internal WDTs 336

features 336

interrupt-driven solutions, versus polling-based solutions

button debouncing case study 290

communication protocols case study 291, 292

sensor data acquisition case study 291

interrupt handlers 372, 373

Interrupt Request (IRQ) 286

interrupts 100, 286, 308

hardware interrupts 100

importance, in firmware 287

software interrupts 100

versus exceptions 287

working 286, 287

Interrupt Service Routine (ISR) 99, 285, 289

Interrupt Vector Table (IVT) 285, 289

features 289

IWDG driver

developing 341

implementation file 342-344

main file 344-346

project, testing 346

IWDG Key Register (IWDG_KR) 340

IWDG Prescaler Register (IWDG_PR) 341

IWDG Reload Register (IWDG_RLR) 341

IWDG Status Register (IWDG_SR) 341

K

KEEP directive 93

Keil uVision (Keil MDK) 2

key specifications, ADC

resolution 214

step size 215, 216

VREF 215

key STM32 DMA registers 358

DMA Stream Configuration Register (DMA_SxCR) 359

DMA Stream Memory Address Registers (DMA_SxM0AR and DMA_SxM1AR) 360

DMA Stream Number of Data Register (DMA_SxNDTR) 359

DMA Stream Peripheral Address Register (DMA_SxPAR) 360

kicking the dog 334

kilobytes (KB) 81

L

least significant bit (LSB) 197, 239, 274

LED connected, to PA5 of microcontroller

operations, for controlling 52-56

light-emitting diode (LED) 23, 178

linker script 82

available memory, detailing 102

constants 95, 96

entry directive (ENTRY) 89

firmware’s entry point, specifying 102

heap and stack sizes, specifying 103

memory directive (MEMORY) 87, 88

memory layout 85

objectives 101

options 87

output sections, defining 103

section definitions 85, 86

sections directive (SECTIONS) 89-91

sections merging 91

symbol creation 102, 103

symbols 87, 96-98

testing 113, 114

.text output section 103-105

writing 100

linking process 83

loadable sections 83

load memory address (LMA) 84, 92, 93

location counter 94

locator 85

longest wake-up time 387

Low Layer (LL) 24-26

benefits 26

drawbacks 26

low-power modes 383, 385

implementing, ways 384

remote sensors, example use case 384

sleep mode 384, 386

standby mode 384, 387

stop mode 384, 387

low-speed external (LSE) 305

low-speed internal (LSI) 305, 337

LPDS (Low-Power Deepsleep) 392

LPLVDS (Low-Power Regulator in Low Voltage in Deepsleep) 392

M

main stack pointer (MSP) 110

make build system 117-120

basics 120-122

configuring 123, 124

downloading 123

features 119

installing 123, 124

rules 120

Makefiles 72, 117

CC variable 130

CFLAGS variable 130

LDFLAGS variable 130

objectives 125

special variable, applying 129, 130

testing 127-129

user-defined variable, applying 129, 130

writing, for firmware projects 124-127

Master In Slave Out (MISO) 234

Master Out Slave In (MOSI) 234

Maven 119

features 119

megabytes (MB) 81

memory address 360

memory density 81

MEMORY directive 87

usage example 88

usage template 87, 88

memory layout 85

memory management unit (MMU) 92

memory-mapped input/output (I/O) 82

microcontrollers

development tools 2

Minimalist GNU for Windows (MinGW) 119

moderate wake-up time 386

most significant bit (MSB) 197, 239

MRLVDS (Main Regulator in Low Voltage in Deepsleep) 392

multi-device communication 191

master-slave 191

multi-master 191

versus point-to-point communication 191

multiplexing 217

N

NACK 264

Nested Vectored Interrupt Controller (NVIC) 285-388

features 288

neural network 139

New icon 21

non-loadable, non-allocatable sections 83

non-maskable interrupt (NMI) 289

Not Slave Select (NSS) 234

NUCLEO-F411 development board 13, 14

Arduino-compatible headers, locating 32, 33

berg pins, locating 32-34

LED connection, locating 30, 31

User Push button, locating 31, 32

Nyquist Theorem 212

O

object files 61

offset 133

open-drain configuration 236

Open On-Chip Debugger (OpenOCD) 74

setting up 6-12

used, for uploading firmware to microcontroller 75-78

options

in linker scripts 87

Output Data Register (ODR) 47, 174

overrun error (ORE) 201

P

parallel communication 191

versus serial communication 190

parity bit 198

even parity 198

odd parity 198

PDDS (Power Down Deepsleep) 392

periodic data logging 387

peripheral address 360

peripheral events 389

peripheral memory 82

peripheral registers

base address, obtaining 132, 133

defining, with C structures 132

offsets, obtaining 132, 133

peripheral structures

implementing 134, 135

point-to-point communication 191

versus multi-device communication 191

ports 35

Power Control Register 386

power gating 383

implementing, ways 383

wearable devices, example use case 383

power management techniques 382

clock gating 383

Dynamic Voltage and Frequency Scaling (DVFS) 382

low power modes 383, 384

power gating 383

prescaler register 181

prescalers 306

asynchronous prescaler 306

synchronous prescaler 306

Prescaler value update (PVU) 341

Programmable Logic Controller (PLC) 335

PROVIDE directive 94

pull-up resistors 272

Pulse Width Modulation (PWM) signals 178

Q

quantization 212

quantization error 213

quantization noise 213

quick wake-up time 386

R

RCC AHB1 Peripheral Clock Enable Register (RCC_AHB1ENR) 41

read bit 264

read data register not empty (RXNE) 201

read/write (R/W) bit 266

Real-Time Clock (RTC) 302

importance 303

use cases 302

working 302

real-time operating systems (RTOSs) 168, 178

Receive Buffer Register Not Empty (RXNE) flag 275

reference voltage (VREF) 214

registers 43

definitions 49, 50

manipulation 49

regular channels

versus injected channels 218

Reload value update (RVU) 341

relocatable file 62

remote IoT devices 387

repeated start condition 264

Reset and Clock Control (RCC) 27, 41, 132, 345

resistor-capacitor (RC) oscillator 339

restart condition 274

RM0383 40

RTC alarms 387, 389

interrupt handling 389

RTC configuration 389

RTC driver

BCD format 323

developing 313

header file 326, 327

implementation file 313-322

main file 327-329

RTC registers 311

RTC Alarm Registers (RTC_ALRMAR and RTC_ALRMBR) 313

RTC Control Register (RTC_CR) 312

RTC Date Register (RTC_DR) 311

RTC Initialization and Status Register (RTC_ISR) 312

RTC Prescaler Register (RTC_PRER) 312

RTC Time Register (RTC_TR) 311

RTC Wakeup Timer Register (RTC_WUTR) 313

S

sampling frequency 212

sampling intervals 212

sampling rate 212

scan mode (SCAN) 219

SD card

data, logging for industrial equipment 195

sections

allocatable 83

attributes 83

definitions 85, 86

implications 83

loadable 83

non-loadable, non-allocatable 83

SECTIONS directive 89

usage example 89-91

sensor monitoring 386

Serial Clock (SCK) 234

Serial Clock (SCL) 262

serial communication 190

asynchronous protocol 190

synchronous protocol 190

versus parallel communication 190

Serial Data In (SDI) 234

Serial Data Out (SDO) 234

Serial Data (SDA) 262

Serial Peripheral Interface (SPI) 36, 190-194, 231-234

advantages 193

disadvantages 193

features 193, 234

interface 234

use cases 195

working 236

shared EXTI lines 294

Single Instruction Multiple Data (SIMD) instruction sets 139

Slave Select (SS) 234

sleep mode 386

smart agriculture

environmental monitoring system 196

smart doorbell system 389

smart home lighting system 389

software interrupts 100

solar-powered environmental monitor case study 385

clock gating 385

DVFS 385

low-power modes 385

power gating 385

Source Control Management (SCM) 119

SPI Control Register 1 (SPI_CR1) 239

SPI Data Register 1 (SPI_DR) 240

SPI driver

ADXL345 accelerometer 248

CS management 248

data reception 247

data transmitting with SPI 247

developing 240-244

GPIO initialization for SPI 245

header file 248

macros, defining 244

SPI1 configuration 246, 247

SPI interface 234, 236

SPI registers 239

SPI Control Register 1 (SPI_CR1) 239

SPI Data Register 1 (SPI_DR) 240

SPI Status Register 1 (SPI_SR) 240

SPI speed 238

SPI Status Register 1 (SPI_SR) 240

stack pointer 103

standby flag (SBF) 394

standby mode 387

start bit 198

start condition 263, 264

start conversion of regular channels (SWSTART) 220

startup file

default handler 111

external symbol declarations 108

function prototypes and attributes 109, 110

reset handler implementation 112, 113

testing 113, 114

vector table definition 110, 111

writing 106

static acceleration of gravity 251

static random access memory (SRAM) 80, 81

status register (SR) 181, 224

STM32CubeIDE

navigating 17-20

setting up 3-5

STM32 External Interrupt (EXTI) controller 285, 292

external interrupt/event line mapping 294

EXTI lines 294

features 293

GPIO pins 294

lines, configuring as interrupt resources 293

STM32F4 ADC peripheral 216

ADC channels 216

regular channels, versus injected channels 218

STM32F4 DMA block diagram

key STM32 DMA registers 358

STM32F4 DMA block diagram 356, 358

STM32F4 microcontroller

channel selection 354

DMA data modes 355

DMA modules 353

DMA transactions 354

double buffer mode 355

I2C peripherals 267

key features 354

low-power modes 385

transfer modes 355

STM32F4 microcontroller, transfer modes

memory-to-memory mode 355

memory-to-peripheral mode 355

peripheral-to-memory mode 355

STM32F4 RTC module

alarms 308

backup and control registers 310

backup registers 310

calibration and synchronization 309

clock sources 305

components 305

control registers 310

output control 310

prescalers 306

tamper detection 309

time and date registers 307

wakeup timer 308, 309

STM32F4 SPI peripherals 238

key features 238

SPI registers 239

STM32F4 UART peripheral 200

USART_BRR register 201

USART_CR1 register 202

USART_DR register 201

USART_SR register 200

stm32f411 memory map 80

STM32F411 microcontroller 180

STM32F411xC/E microcontroller series 150

ports, features 150

STM32 flash memory

attributes 81

STM32 GPIO registers 151

configuration registers 151

data registers 151

STM32 IWDG 338

features 339

working 339, 340

STM32 memory model 80

flash memory 80, 81

peripheral memory 82

static random access memory (SRAM) 80, 81

STM32 RTC module 304

features 304

STM32 SRAM

attributes 82

STM32 timers 179

advanced timers 180

general-purpose timers 180

timer clock prescaling 182, 183

UEV computing 183, 184

working 181

STMicroelectronics 24

datasheet 15

documentation 15

documents, obtaining 16, 17

Reference Manual (RM) 15

User Manual (UM) 15

st_nucleo_f4 series 75

stop bit 198

stop condition 264

stop mode 386, 387

stream 353

structure-based register access method

evaluating 136-138

symbols

in linker scripts 87, 96-98

synchronous communication 190

synchronous mode (USART) 200

SYSCFG_EXTICR configuration 294

system clock (SYSCLK) 182

System Control Register (SCR) 386

system events 389

system monitoring 168

System Tick (SysTick) timer 167, 168

driver, developing 171-175

features 168

registers 168

use cases 168

System Viewer Description (SVD) 140

SysTick Calibration Value Register 171

SysTick Control and Status Register (SYST_CSR) 169

SysTick Current Value Register 170

SysTick Reload Value Register (SYST_RVR) 169, 170

SysTick timer 178

T

task scheduling 168

threshold-level buffering 354

tilt-sensing 252

Timer counter (TIMx_CNT) 183

timer driver

developing 184-187

time register (RTC_TR) 307

Timer prescaler (TIMx_PSC) 183

timers 36, 177

timers, use cases 178

delay generation 179

event trigger 179

time interval measurement 178

time tracking 168

transmission complete (TC) 201

transmit data register empty (TXE) 201

tri-state buffering 236

type cast 51

U

UART data packet

parity bit 198

start bit 198

stop bit 198

UART DMA driver

developing 364-370

DMA configuration, for UART reception 371

DMA configuration, for UART transmission 371

DMA initialization 371

helper functions 372

interrupt handlers 372, 373

project, testing 374

UART initialization 371

UART driver

developing 202-209

UG bit 181

UL suffix 50

universal asynchronous receiver/transmitter (UART) 36, 189-196, 234, 345

advantages 192

baud rate 199

disadvantages 192

features 192

interface 197

use cases 194

working 197

unsigned int * expression 51

Update Event Frequency (UEV)

computing 183, 184

update events (UEVs) 181

update interrupt flag (UIF) 181

USART Baud Rate Register (USART_BRR) 201

fraction field 201

mantissa field 201

USART Control Register 1 (USART_CR1) 202

parity control enable (PCE) 202

parity selection (PS) 202

receiver enable (RE) 202

transmitter enable (TE) 202

USART enable (UE) 202

word length (M) 202

USART Data Register (USART_DR) 201

functions 201

USART Status Register (USART_SR) 200

overrun error (ORE) 201

read data register not empty (RXNE) 201

transmission complete (TC) 201

transmit data register empty (TXE) 201

use cases, RTC

alarm clocks 303

data logging 302

User Program Files 142

V

virtual memory address (VMA) 84, 92, 93

volatile keyword 51

W

Wait For Event (WFE) 385

Wait For Interrupt (WFI) 385

wake-up sources 388

external interrupts 388

internal events 389

practical considerations 390

RTC alarms 389

wakeup timer 308, 309

watchdog timers (WDTs) 333, 334

automotive systems 335

consumer electronics 335

external WDTs 337

industrial automation 335

internal WDTs 336

IWDGs 337

medical devices 335

practical considerations 336

selecting 338

windowed WDTs (WWDTs) 337

working 334

wearable fitness tracker 390

windowed WDTs (WWDTs) 337, 338

features 337

write bit 264