Chapter 11: High-Frequency FPGA and Crypto
Welcome to the final chapter of this book. In the previous chapters, we saw how to optimize traditional trading to obtain a high-frequency trading (HFT) system working with a tick-to-trade latency of 5 microseconds. In the next section, we will discuss how to improve this latency to 500 nanoseconds using advanced hardware optimization. Finally, we will conclude this book by exploring the difference between traditional and cryptocurrency trading.
Our goal in this chapter is to show that the software solution we used in the past chapters has limitations in achieving latency lower than 1 microsecond. Using a specific piece of hardware, we will show you that it is possible. The second goal is to apply the optimization we explained in this book to cryptocurrencies. We will elaborate by extending the design to the cloud.
In this chapter, we will cover the following topics:
- How Field Programmable Gate Arrays (FPGAs) hardware can...
