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Architecting High-Performance Embedded Systems

You're reading from   Architecting High-Performance Embedded Systems Design and build high-performance real-time digital systems based on FPGAs and custom circuits

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Product type Paperback
Published in Feb 2021
Publisher Packt
ISBN-13 9781789955965
Length 376 pages
Edition 1st Edition
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Author (1):
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Jim Ledin Jim Ledin
Author Profile Icon Jim Ledin
Jim Ledin
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Table of Contents (15) Chapters Close

Preface 1. Section 1: Fundamentals of High-Performance Embedded Systems
2. Chapter 1: Architecting High-Performance Embedded Systems FREE CHAPTER 3. Chapter 2: Sensing the World 4. Chapter 3: Operating in Real Time 5. Section 2: Designing and Constructing High-Performance Embedded Systems
6. Chapter 4: Developing Your First FPGA Program 7. Chapter 5: Implementing systems with FPGAs 8. Chapter 6: Designing Circuits with KiCad 9. Chapter 7: Building High-Performance Digital Circuits 10. Section 3: Implementing and Testing Real-Time Firmware
11. Chapter 8: Bringing Up the Board for the First Time 12. Chapter 9: The Firmware Development Process 13. Chapter 10: Testing and Debugging the Embedded System 14. Other Books You May Enjoy

Using FPGAs in real-time embedded system designs

As we saw in the Elements of FPGAs section of Chapter 1, Architecting High-Performance Embedded Systems, a typical FPGA device contains a large number of lookup tables, flip-flops, block RAM elements, DSP slices, and other components. While it can be instructive to understand the detailed capabilities of each of these components, such concerns are not necessarily informative during the FPGA development process. The most important constraint to keep in mind is that a specific FPGA part number contains a finite number of each of these elements, and a design cannot exceed those limits when targeted at that particular FPGA model.

Instead, it is more productive to view the FPGA development process from the perspective of the embedded system's statement of requirements. You can begin to develop the FPGA design targeted at a somewhat arbitrarily chosen FPGA model. As development proceeds, you may reach a resource limit or identify an...

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