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FPGA Programming for Beginners

You're reading from   FPGA Programming for Beginners Bring your ideas to life by creating hardware designs and electronic circuits with SystemVerilog

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Product type Paperback
Published in Mar 2021
Publisher Packt
ISBN-13 9781789805413
Length 368 pages
Edition 1st Edition
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Author (1):
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Frank Bruno Frank Bruno
Author Profile Icon Frank Bruno
Frank Bruno
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Table of Contents (16) Chapters Close

Preface 1. Section 1: Introduction to FPGAs and Xilinx Architectures
2. Chapter 1: Introduction to FPGA Architectures and Xilinx Vivado FREE CHAPTER 3. Section 2: Introduction to Verilog RTL Design, Simulation, and Implementation
4. Chapter 2: Combinational Logic 5. Chapter 3: Counting Button Presses 6. Chapter 4: Let's Build a Calculator 7. Chapter 5: FPGA Resources and How to Use Them 8. Chapter 6: Math, Parallelism, and Pipelined Design 9. Section 3: Interfacing with External Components
10. Chapter 7: Introduction to AXI 11. Chapter 8: Lots of Data? MIG and DDR2 12. Chapter 9: A Better Way to Display – VGA 13. Chapter 10: Bringing It All Together 14. Chapter 11: Advanced Topics 15. Other Books You May Enjoy

Questions

  1. What are AXI streaming interfaces best for?

    a) Burst transactions to multiple memory addresses

    b) Point-to-point connections

    c) High-performance connections

    d) B&C

  2. What is the IP integrator?

    a) An easy way to create block-based designs using Xilinx or user-defined IP

    b) A context-sensitive editor for HDL designs

    c) Not very good at aiding design debug

  3. If you want to create an IP from an existing design, you would use Create and package new IP. True or false?
  4. You cannot use Create and package new IP to generate a design wrapper with AXI interfaces to create your own designs. True or false?
  5. When should full AXI interfaces be used?

    a) When you need a high-performance interface that can burst data to multiple memory addresses.

    b) When you only write a single register at a time infrequently.

    c) When you have lots of data to move between two cores where the destination is a FIFO-like interface.

    d) All the time. They are cheap to implement and can do everything.

  6. ...
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