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Embedded Systems Architecture

You're reading from   Embedded Systems Architecture Design and write software for embedded devices to build safe and connected systems

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Product type Paperback
Published in Jan 2023
Publisher Packt
ISBN-13 9781803239545
Length 342 pages
Edition 2nd Edition
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Author (1):
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Daniele Lacamera Daniele Lacamera
Author Profile Icon Daniele Lacamera
Daniele Lacamera
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Table of Contents (18) Chapters Close

Preface 1. Part 1 – Introduction to Embedded Systems Development
2. Chapter 1: Embedded Systems – A Pragmatic Approach FREE CHAPTER 3. Chapter 2: Work Environment and Workflow Optimization 4. Part 2 – Core System Architecture
5. Chapter 3: Architectural Patterns 6. Chapter 4: The Boot-Up Procedure 7. Chapter 5: Memory Management 8. Part 3 – Device Drivers and Communication Interfaces
9. Chapter 6: General-Purpose Peripherals 10. Chapter 7: Local Bus Interfaces 11. Chapter 8: Power Management and Energy Saving 12. Chapter 9: Distributed Systems and IoT Architecture 13. Part 4 – Multithreading
14. Chapter 10: Parallel Tasks and Scheduling 15. Chapter 11: Trusted Execution Environment 16. Index 17. Other Books You May Enjoy

Scheduler implementation

The architecture of the system depends on the way the scheduler is implemented. Tasks can be running in a cooperative model until they voluntarily decide to yield the CPU to the next task, or the OS can decide to trigger an interrupt to swap the running task behind the scenes, applying a specific policy to decide the interval in between task switches and the priority for the selection of the next task. In both cases, the context switch happens within one of the supervisor calls available, set to decide which tasks to schedule next, and to perform the context switch. In this section, the full context switch procedure through PendSV will be added to our example, and then a few of the possible scheduling policies will be analyzed and implemented.

Supervisor calls

The core component of the scheduler consists of the exception handler associated with the system interrupt events, such as PendSV and SVCall. On Cortex-M, a PendSV exception can be triggered at...

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