Demystifying per-CPU interrupts
The most common ARM interrupt controller, GIC in the ARM multi-core processor, supports three types of interrupts:
- CPU private interrupts: These interrupts are private per CPU. If triggered, such a per-CPU interrupt will exclusively be serviced on the target CPU or CPU to which it is bound. Private interrupts can be split into two families:
- Private peripheral interrupts (PPIs): These are private and can only be generated by hardware bound to the CPU.
- Software-generated interrupts (SGIs): Unlike PPIs, these are generated by the software. Thanks to this, SGIs are usually used as interrupt IPIs for inter-core communication on multi-core systems, meaning that one CPU can generate an interrupt (by writing the appropriate message, made of the interrupt ID and the target CPU to the GIC controller) to (an)other CPU(s). This is what we will talk about in this section.
- Shared peripheral interrupts (SPIs) (not to be confused with the SPI bus): These...
