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Architecting and Building High-Speed SoCs

You're reading from   Architecting and Building High-Speed SoCs Design, develop, and debug complex FPGA based systems-on-chip

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Product type Paperback
Published in Dec 2022
Publisher Packt
ISBN-13 9781801810999
Length 426 pages
Edition 1st Edition
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Author (1):
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Mounir Maaref Mounir Maaref
Author Profile Icon Mounir Maaref
Mounir Maaref
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Table of Contents (20) Chapters Close

Preface 1. Part 1: Fundamentals and the Main Features of High-Speed SoC and FPGA Designs
2. Chapter 1: Introducing FPGA Devices and SoCs FREE CHAPTER 3. Chapter 2: FPGA Devices and SoC Design Tools 4. Chapter 3: Basic and Advanced On-Chip Busses and Interconnects 5. Chapter 4: Connecting High-Speed Devices Using Buses and Interconnects 6. Chapter 5: Basic and Advanced SoC Interfaces 7. Part 2: Implementing High-Speed SoC Designs in an FPGA
8. Chapter 6: What Goes Where in a High-Speed SoC Design 9. Chapter 7: FPGA SoC Hardware Design and Verification Flow 10. Chapter 8: FPGA SoC Software Design Flow 11. Chapter 9: SoC Design Hardware and Software Integration 12. Part 3: Implementation and Integration of Advanced High-Speed FPGA SoCs
13. Chapter 10: Building a Complex SoC Hardware Targeting an FPGA 14. Chapter 11: Addressing the Security Aspects of an FPGA-Based SoC 15. Chapter 12: Building a Complex Software with an Embedded Operating System Flow 16. Chapter 13: Video, Image, and DSP Processing Principles in an FPGA and SoCs 17. Chapter 14: Communication and Control Systems Implementation in FPGAs and SoCs 18. Index 19. Other Books You May Enjoy

To get the most out of this book

You need to have familiarity with digital electronics in general and, specifically, you need to have some fundamental knowledge of modern logic design at a RTL using a hardware design language such as VHDL, Verilog, or SystemVerilog. You will also need some working knowledge of embedded programming using a high-level language such as C or C++ and have some experience using cross-compilers to build executables for a target embedded processor. The hardware design flow and the embedded software design flow both use tools packaged within the Xilinx Vivado and Vitis environments. You will be guided through their installation processes on your host machine. If you are running a Windows operating system on your host machine, you will be guided through installing VirtualBox, which is an Oracle hypervisor to host a Linux guest operating system to be used as your development host operating system.

Software/hardware covered in the book

Operating system requirements

Xilinx Vivado 2021.2 or a higher version

Windows Enterprise and Professional 10.0

Or Window 10 HE and VirtualBox

Or Ubuntu 16.04.5 LTS up to 20.04.1 LTS

Xilinx Vitis

Windows Enterprise and Professional 10.0

Or Window 10 HE and VirtualBox

Or Ubuntu 16.04.5 LTS up to 20.04.1 LTS

VirtualBox

Windows 10

All the required installation steps are described in detail in the book using a simple, logical step-by-step approach that will get you up and running with the tools. Simply follow the instructions and don’t skip any steps during the installation process. Also, make sure you perform the required configuration when indicated to do so, so the tools are ready to use without wasting time debugging issues that are sometimes hard to track if a step in the installation or configuration process has been skipped or omitted.

If you are using the digital version of this book, we advise you to type the code yourself or access the code from the book’s GitHub repository (a link is available in the next section). Doing so will help you avoid any potential errors related to the copying and pasting of code.

If you can get hold of a Xilinx Zynq-7000 SoC board, this will be great as you can download the FPGA bitstream and the executable software to the board and perform debugging and profiling on the real hardware. Nevertheless, if you don’t have access to a Xilinx Zynq-7000 SoC board, you can still use a virtual target within the Xilinx tools to debug and interact with the executable software running on the virtual target.

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