Multiplexing for SPI on the BBB

The AM335X processor of the BBB provides two SPI buses: SPI0 and SPI1. Both buses are accessible via the P9 header. By default, no SPI buses are muxed. The following figure shows each of the potential pins on the P9 header where SPI signals can be muxed in different pinmux modes:

Locations of the SPI buses on the P9 header with different pinmux modes

When deciding how you would like your pins to be muxed using SPI in your projects, keep the following in mind:

• When in doubt, stick with using the SPI0 bus muxed to the P9.17, P9.18, P9.21, and P9.22 pins.
• The SPI1 channel conflicts with the I2C bus used by the capemgr (P9.20) and audio output (P9.28, P9.29, P9.31). Be aware that muxing these pins to use SPI1 can disable some other functionality that you are depending upon for a full-featured Android system.
• If you are using other cape boards in your projects, make sure that these capes don't require the use of the SPI buses. Only one device can exist on each...