Chapter 2
- For UART: Single-ended: Two wires (data and ground). There is no clock line needed since it is asynchronous and devices keep their own time and agree ahead of time on the baud rate. Differential: Two wires (data high and data low). The differential voltage is measured instead of voltage versus ground.
I2C: Two wires, serial clock (SCL) and serial data (SDA), using a bus architecture with master and slave devices.
SPI: 3 + 1n wires, where n is the number of slave devices. Three primary wires: signal clock (SCLK), master out slave in (MOSI), and master in slave out (MISO); and one slave select (SS) wire for each slave device.
CAN: Two wires, CAN-HI and CAN-LO, using a bus architecture with CAN-HI and CAN-LO acting as a differential pair.
- Noise can be reduced by using a differential pair where noise affects both signals similarly. The wires are twisted around each other to cancel any induced currents.
- Serial transmission sends all bits across a single wire one after...