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Bare-Metal Embedded C Programming

You're reading from   Bare-Metal Embedded C Programming Develop high-performance embedded systems with C for Arm microcontrollers

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Product type Paperback
Published in Sep 2024
Publisher Packt
ISBN-13 9781835460818
Length 438 pages
Edition 1st Edition
Languages
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Author (1):
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Israel Gbati Israel Gbati
Author Profile Icon Israel Gbati
Israel Gbati
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Toc

Table of Contents (21) Chapters Close

Preface 1. Chapter 1: Setting Up the Tools of the Trade FREE CHAPTER 2. Chapter 2: Constructing Peripheral Registers from Memory Addresses 3. Chapter 3: Understanding the Build Process and Exploring the GNU Toolchain 4. Chapter 4: Developing the Linker Script and Startup File 5. Chapter 5: The “Make” Build System 6. Chapter 6: The Common Microcontroller Software Interface Standard (CMSIS) 7. Chapter 7: The General-Purpose Input/Output (GPIO) Peripheral 8. Chapter 8: System Tick (SysTick) Timer 9. Chapter 9: General-Purpose Timers (TIM) 10. Chapter 10: The Universal Asynchronous Receiver/Transmitter Protocol 11. Chapter 11: Analog-to-Digital Converter (ADC) 12. Chapter 12: Serial Peripheral Interface (SPI) 13. Chapter 13: Inter-Integrated Circuit (I2C) 14. Chapter 14: External Interrupts and Events (EXTI) 15. Chapter 15: The Real-Time Clock (RTC) 16. Chapter 16: Independent Watchdog (IWDG) 17. Chapter 17: Direct Memory Access (DMA) 18. Chapter 18: Power Management and Energy Efficiency in Embedded Systems 19. Index 20. Other Books You May Enjoy

The STM32 IWDG

In this section, we’ll analyze the STM32 IWDG module, exploring its main features and other relevant information to help you understand how to leverage this powerful feature in your embedded applications.

STM32 microcontrollers feature two types of WDTs: the IWDG and the Window Watchdog (WWDG). Both are essential for detecting and correcting software malfunctions by initiating a system reset, but they each have unique characteristics and applications.

The IWDG operates using a dedicated LSI clock, ensuring it continues to function even if the main system clock fails. This makes it highly reliable for applications that require continuous monitoring, regardless of the main clock’s state. In contrast, the WWDG derives its clock from the APB1 clock and features a configurable time window. The system must refresh the WWDG within this time window; failing to do so, either too early or too late, will trigger a system reset.

The IWDG is best suited for...

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