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Architecting High-Performance Embedded Systems

You're reading from   Architecting High-Performance Embedded Systems Design and build high-performance real-time digital systems based on FPGAs and custom circuits

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Product type Paperback
Published in Feb 2021
Publisher Packt
ISBN-13 9781789955965
Length 376 pages
Edition 1st Edition
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Author (1):
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Jim Ledin Jim Ledin
Author Profile Icon Jim Ledin
Jim Ledin
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Table of Contents (15) Chapters Close

Preface 1. Section 1: Fundamentals of High-Performance Embedded Systems
2. Chapter 1: Architecting High-Performance Embedded Systems FREE CHAPTER 3. Chapter 2: Sensing the World 4. Chapter 3: Operating in Real Time 5. Section 2: Designing and Constructing High-Performance Embedded Systems
6. Chapter 4: Developing Your First FPGA Program 7. Chapter 5: Implementing systems with FPGAs 8. Chapter 6: Designing Circuits with KiCad 9. Chapter 7: Building High-Performance Digital Circuits 10. Section 3: Implementing and Testing Real-Time Firmware
11. Chapter 8: Bringing Up the Board for the First Time 12. Chapter 9: The Firmware Development Process 13. Chapter 10: Testing and Debugging the Embedded System 14. Other Books You May Enjoy

Attributes of a real-time embedded system

The hardware and software of a real-time embedded system must exhibit some specific characteristics to ensure the system reliably meets its performance goals of producing reliably correct and timely outputs. Most real-time embedded systems that perform functions of moderate to high complexity must divide the processing work into multiple tasks that execute in an apparently (to the user) simultaneous manner, including managing the operation of hardware such as an automobile engine while regularly updating information displayed to the driver.

At the finest-grained level of processor operation, most embedded systems rely on the use of interrupts to notify the processor when an operation is required by an I/O device. In a real-time application, the handling of interrupts can become a critical factor in ensuring proper system operation. At the simplest level, any time an interrupt is being processed, the code algorithm that was paused to handle...

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